This invention relates to photolithography systems for high resolution circuit imaging, and specifically relates to step and repeat photo systems imaging multiple chip carriers through a projection lens onto large circuit panels or substrates. More particularly, this invention relates to photolithography systems employing a large area projection lens (e.g. 6-8 inch diameter field of view) and provides for a system and method of configuring the image magnification responsive to distortion factors observed in a panel receiving the image.
The present invention relates to systems and methods of photolithography for exposing large substrates at high imaging resolutions. Examples of products manufactured by said processes include integrated circuits on silicon wafers, flat-panel displays on glass substrates, and multi-chip modules and printed circuit boards and laminate substrates. As is well known in the art, a circuit pattern or xe2x80x9cmaskxe2x80x9d is exposed by projection onto a photosensitive substrate, such as a glass or metal substrate coated with a photo xe2x80x9cresist.xe2x80x9d One method of projection exposure is known as the xe2x80x9cstep-and-repeatxe2x80x9d method in which, after a mask pattern has been exposed onto a specific region of a substrate, the substrate is moved or xe2x80x9csteppedxe2x80x9d a specific distance and the mask pattern is then exposed again onto another portion of the substrate, resulting in a pattern or array of the same mask circuit repeatedly exposed upon the substrate surface. In the manufacturing of laminated chip carriers it is typical to fabricate multiples of one type of chip carrier on a larger planar circuit panel in this fashion, then singulate the individual carriers near the final stages of the panel build sequence. The mask used by the stepper image system is typically created on a Computer Aided Drawing (xe2x80x9cCADxe2x80x9d) system. The size of the mask, and the number and arrangement of individual circuit images defined by the mask, are determined responsive to the projected circuit size and required tolerances, the size of the field of view of the image projection system, and the characteristics of the panel substrate receiving the projected image.
Although it is typically desired that the panel substrate present a planar upper surface for receiving the projected image, in fact, the upper surface often diverges from a uniform planar shape. The common process steps utilized to fabricate a typical laminated substrate panel comprising epoxy resin and a fiberglass mesh substrate, from the beginning of circuitizing a chip carrier core and progressing to the outer layer circuit patterns, cause the physical dimensions of the resultant panel to change. Surface and dimensional anomalies are even more pronounced for laminate substrate structures fabricated with Teflon(copyright) and copper and without fiber reinforcing elements. The instability of the resultant structure is increased, with distortion factors varying by as much as 500 ppm along different portions of the substrate. Accordingly, it is common for large planar manufactured circuit panels, and in particular for laminated panel structures, to have surface anomalies that result in distortion of the upper planar surface, creating dimensional differences in both the X and Y axes of the upper planar surface of the panel.
When manufacturing multiples of smaller circuit patterns from a larger panel, large area xe2x80x9cStepper Projection Imagingxe2x80x9d is one method of altering the whole panel image dimension by altering the magnification, and altering the repeating step increments to stitch together a pattern that matches the panel characteristics. (It is to be understood that altering or adjusting the magnification comprehends reducing as well as enlarging a mask image before projecting it upon a photosensitive substrate, conventionally with a projection lens.) As is well known in the art, a large area stepper expose tool projecting a chip carrier image through a 6-8xe2x80x3 diameter 1-X lens can expose a multiple image stitched pattern of the chip carrier to provide a large panel image. With the use of a vision system, the tool can view alignment marks on the panel, and control an X/Y positioning system to move the panel into the correct registration to receive the projected mask image. The position of the alignment marks also are used to calculate the X and Y dimensions of the panel, along with the factors of dimension change. These factors are used to adjust X and Y step increments of the positioning system during the stitching of the complete panel circuit pattern.
The factors are also used in the control and adjusting of the magnification of the individual projected circuit patterns to best fit the panel dimensions. In prior art systems and methods, the magnification is usually adjusted to the average of the X and Y factors calculated from the panel alignment marks and, when imaging each circuit layer of a multilayered circuit panel, the image is typically altered to best fit the existing panel dimensions. While the step increments can be controlled independently in both X and Y axes, the magnification change of a typical 1xc3x97 projection lens is in unity. Using multiple image mask patterns, designed to fill the diameter of the projection lens (e.g. 3xc3x973, 3xc3x974, or 2xc3x973 pattern arrays), the projected image is altered by equal factors both X and Y axes. A problem occurs when the change in circuit panel dimensions of X and Y axes are greatly different, are. not predictable or repeatable, and the designed registration tolerances cannot be met. What is needed is a system and method of circuit panel imaging, by which stepper projection tool control, along with circuit mask design, can better accommodate unpredictable, independent X and Y dimensional differences.
The object of this invention is to provide a photolithographic imaging system and method that perform the tasks of mask alignment, panel recognition, establishing position offsets and adjusting mask rotation for accurate overlay imaging of the mask onto the panel, and correctly adjusting image magnification or reduction to properly size each stepped image to the panel distortion. This invention applies more directly to substrate panels whose dimensional stability is found difficult to control, repeatedly.
More specifically, it applies to panels whose X axis distortion factor varies greatly from its Y axis distortion factor and the average adjustment of the image magnification or reduction does not satisfy tight registration requirements. What is new is that the calculation of the magnification or reduction adjustment is based on the mask image dimensions.